devutilsFrançais · article non traduitGitHub A language for two-state decisions
In this introductory model, a Boolean variable has one of two values: 0 or 1. We interpret them as false and true. The same symbols can describe whether an ideal switch allows a path to conduct. The interpretation matters: a number in an expression is a model of a state, not a measurement of voltage.
You need no electronics background for this page. Familiarity with tables and parentheses is enough.
Three operations
AND is true when both inputs are true. OR is true when at least one input is true. NOT reverses a value. Here, OR includes the case where both inputs are true; exclusive OR is a different operation.
| A | B | A AND B | A OR B |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 |
NOT 0 = 1 and NOT 1 = 0. A truth table lists every possible input combination, so it lets us check an expression without relying on a few examples.
Work through a decision
Imagine a fictional access rule: a door may open when a badge is valid and either the room is staffed or a supervisor has approved access. This is a teaching example, not a security design.
open = badge AND (staffed OR approved)For badge = 1, staffed = 0 and approved = 1, evaluate the parentheses first: 0 OR 1 = 1. Then 1 AND 1 = 1. Changing badge to 0 makes the result 0 regardless of the other two inputs. Three inputs have eight combinations; checking all eight would fully specify this Boolean rule.
From expressions to paths
Under a convention where 1 means a conducting switch, two switches in series model AND: both must conduct. Two branches in parallel model OR: either branch provides a path. This page uses 1 for conduction. Shannon’s original paper instead defines a hindrance variable with 1 for an open circuit (printed p. 472); do not transfer its notation directly into this convention. This interpretation connects symbolic reasoning to switching-circuit analysis.
An expression can have several equivalent forms. For example, A AND (B OR C) equals (A AND B) OR (A AND C). Enumerating the eight combinations of A, B and C verifies that they agree. Algebraic transformations can therefore help compare alternative circuit structures.
What the model leaves out
A Boolean expression does not specify propagation delay, power consumption, noise tolerance or what happens while an input changes. A real circuit needs a physical implementation and timing analysis. Sequential systems also need a representation of stored state; a combinational expression alone does not describe their full behavior.
Historical connection
Claude Shannon connected symbolic logic with relay-network analysis in the work discussed in our historical entry. The cited paper explains the algebraic treatment; the truth table and access-rule example here are original teaching examples.
Continue learning
Read logic gates next, or follow the complete digital-logic path through selection, addition, storage and a clocked counter.
Verification record
- Sources assessed by Codex (assistant)
- Example checks recorded
- Independent human review pending
Selected claims have been assessed against the passages below. This record does not certify every sentence or guarantee correctness.
Inspect claims, evidence and limitations
Source assessment: . 3 of 3 selected claims marked supported by the assessor. This is not a coverage percentage for the article.
The displayed two-state AND, inclusive OR and NOT rules use the stated truth convention.
Assessor finding: supported · definition · Article passage
- Cornell CS 3410, Gates and Logic — definitions and arithmetic — PDF pages 10–14, gate truth tables
Passage read: Source passage read during this assessment.
The article’s own table is recomputed by an executable check.
- Cornell CS 3410, Gates and Logic — definitions and arithmetic — PDF pages 10–14, gate truth tables
This article uses 1 for conduction, unlike Shannon’s hindrance convention.
Assessor finding: supported · historical · Article passage
- Shannon, A Symbolic Analysis of Relay and Switching Circuits (1938), introductory sections — Printed p. 472, Section II: Fundamental Definitions and Postulates; PDF page 2
Passage read: Source passage read during this assessment.
The scanned page was inspected visually; Shannon assigns 1 to an open path. The article now states the difference explicitly.
- Shannon, A Symbolic Analysis of Relay and Switching Circuits (1938), introductory sections — Printed p. 472, Section II: Fundamental Definitions and Postulates; PDF page 2
A logical table alone is not an electrical or timing specification.
Assessor finding: supported · model · Article passage
- Cornell CS 3410, Gates and Logic — definitions and arithmetic — PDF pages 58–70, transistor implementation and abstraction
Passage read: Source passage read during this assessment.
This is the scope of the introductory model, not a physical circuit acceptance result.
- Cornell CS 3410, Gates and Logic — definitions and arithmetic — PDF pages 58–70, transistor implementation and abstraction
Reproducible checks
- Boolean table, access-rule substitutions and distributivity over all inputs.
Passed on 2026-10-27
node --test --test-name-pattern='article substitutions, capacities, signed sums and completion answers are reproducible' src/library/exercises.test.ts
Limits and open work
- The access rule is a fictional teaching example, not a reviewed security policy.
- The source comparison does not verify transistor timing or a hardware implementation.
Independent human review
Pending. No independent human reviewer has signed off this version.
Content fingerprint: 0e2d691aa15b028faf616b498436515dbefc4e6b6effadaa51b08e313c087fb7. An article change invalidates this assessment.
Sources
- Shannon, A Symbolic Analysis of Relay and Switching Circuits (1938), introductory sections
- Cornell CS 3410, Gates and Logic — definitions and arithmetic
Published by devutils · Updated · Original explanatory text; sources retain their own terms.