Start with a question
How can a machine make a decision, add a value and remember the result for the next operation? This path answers that question at the digital-logic level. It builds from a two-valued rule to a small clocked system, with no programming environment or electronics kit required.
The articles and exercises are in English. You need basic arithmetic and the ability to read a table. Binary place values are introduced in the adder lesson. Study at your own pace; a useful pattern is to read one article, reproduce its example, then follow the next linked step.
Follow the seven steps
- Boolean algebra: evaluate AND, OR and NOT and list every combination of inputs.
- Logic gates: treat those rules as components; derive NAND and distinguish a truth table from an electrical specification.
- Gate workbench: predict the outputs of AND, OR, NOT and XOR, then check them interactively or against the static tables.
- Combinational logic: derive a selector expression and prove that it chooses the requested input.
- Binary adders: follow a carry through four positions and explain why a result may need an extra bit.
- Memory and registers: distinguish a stored value from its changing input; calculate the capacity and addressing of a small memory.
- Sequential logic: combine arithmetic and storage, trace a counter and identify the time available between edges.
The linked reading steps below use the canonical articles rather than duplicate their explanations. The older logic-to-circuits path remains a shorter introduction with historical context.
Check your understanding
Before considering the path complete, solve these without looking at the answers:
- Which of OR and XOR returns 0 for inputs 11?
- With D0 = 1010 and D1 = 0111, what does a four-bit selector return for S = 1?
- What are the complete unsigned result and retained four-bit result of 1111 + 0001?
- How many payload bytes are in eight words of sixteen bits each?
- Starting at counter state 101, what happens over enable values 1, 0, 1 with reset held at 0?
Answers and scope
The distinguishing gate is XOR: its result for 11 is 0. The selector returns 0111. The unsigned sum is 10000 and the retained four-bit value is 0000. The memory holds sixteen payload bytes. The counter visits 110, 110 and 111.
You should also be able to name a limit of each model: a gate table omits electrical behavior, a combinational equation omits settling time, a register trace assumes valid timing, and a synchronous counter needs a clocking contract.
This completes the first digital-logic block, not the full planned “Build a computer from scratch” curriculum. Continue with digital control and datapaths for finite-state machines, an ALU and synchronous interfaces. Processor organization builds on those contracts; hardware construction requires additional implementation work. The source course is a reference for the subject progression; these articles, worked values and completion exercises are original.
Reading steps
Verification record
- Sources assessed by Codex (assistant)
- Example checks recorded
- Independent human review pending
Selected claims have been assessed against the passages below. This record does not certify every sentence or guarantee correctness.
Inspect claims, evidence and limitations
Source assessment: . 1 of 1 selected claims marked supported by the assessor. This is not a coverage percentage for the article.
The path progresses from logical primitives to arithmetic, storage and sequential behavior.
Assessor finding: supported · interpretation · Article passage
- MIT OpenCourseWare, Computation Structures — course structure and reference lessons — Course navigation: CMOS, Combinational Logic, Sequential Logic and Design Tradeoffs
Passage read: Source passage read during this assessment.
This is an original editorial sequence; the reference is background, not proof that this exact sequence is optimal.
- MIT OpenCourseWare, Computation Structures — course structure and reference lessons — Course navigation: CMOS, Combinational Logic, Sequential Logic and Design Tradeoffs
Reproducible checks
- Each prerequisite appears before its dependent step.
Passed on 2026-10-27
node --test --test-name-pattern='the digital-logic path teaches every prerequisite before a dependent step' src/library/editorial.test.ts - Completion answers for selection, addition, capacity and counter sequence.
Passed on 2026-10-27
node --test --test-name-pattern='article substitutions, capacities, signed sums and completion answers are reproducible' src/library/exercises.test.ts
Limits and open work
- No pedagogical efficacy or completion-time study has been performed.
- Completing the path does not certify hardware-design competence.
Independent human review
Pending. No independent human reviewer has signed off this version.
Content fingerprint: d100eafdcdf4f400e60d0b2bdb8cc8a273099b197af167c8ae1bbf007dd5becb. An article change invalidates this assessment.
Sources
Published by devutils · Updated · Original explanatory text; sources retain their own terms.